Intel should have invested in a few Linux kernel devs and done whatever it takes to convince Linus to allow a complex scheduler. The way they have done the E/P core move has been an absolute disaster of half baked nonsense.
While it hasn’t officially come out as the actual problem, the timing of everything lines up perfectly. They tried to use microcode only to block off the enterprise instruction set of the P cores because E cores do not have the full instruction set. In Gen 12 it became apparent that the additional AVX instructions were present. It turned out that nobody gives a sh*t about Intel gatekeeping using microcode. No x86 kernels have the complexity present to handle threaded processes and interrupts on an asymmetrical SOC. It exists on some ARM based systems, but not in a real world flexibility scale requited for x86.
I don’t understand why it is so difficult to search for any of the AVX (or other) instructions in the executable and trigger a CPU set isolation to P cores automatically. Then simply add a new flag to compilers for them to declare if software uses full CISC instructions and its threading optimisations. Maybe move most interrupt handling to E cores too. Then old software would have considerably longer startup times, but would still run. Alternatively, just run old stuff on the P cores in isolation. It was likely compiled back when 2-4 cores were reasonable anyways and the system has that many P cores. Maybe add an optional user space warning that their ancient software is not optimised for battery/energy efficiency. Build it for Linux and Windows will eventually adapt or die. Windows 11 was prompted because the W10 CPU scheduler couldn’t deal with the asymmetrical Intel architecture well and required a full rewrite for proper spin up and power management that includes the effects on adjacent cores.
I have yet to try an Intel CPU with their new P/E core architecture (currently on AMD) judging from some of the early problems with E cores and their recent problems, I think this was a good decision.